index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

Steadiness Information leakage AES Mutual Information Analysis MIA Tunneling magnetoresistance FPGA Dual-rail with Precharge Logic DPL Sécurité Coq Reverse-engineering Training GSM Robustness Elliptic curve cryptography Magnetic tunnel junction Logic gates ASIC Fault injection attack MRAM Sensors Internet of Things Simulation Power-constant logic Neural networks Protocols DRAM Side-channel attack Receivers Fault injection Side-channel attacks STT-MRAM OCaml Asynchronous Loop PUF Resistance CRT Variance-based Power Attack VPA Aging Defect modeling Convolution Energy consumption Image processing Magnetic tunneling SCA Signal processing algorithms Hardware security Security Security and privacy PUF Routing Formal methods Reliability Reverse engineering Randomness TRNG Machine learning Electromagnetic Masking countermeasure FDSOI Countermeasures Power demand Spin transfer torque RSA Switches Field Programmable Gates Array FPGA Transistors Intrusion detection Side-Channel Analysis 3G mobile communication Lightweight cryptography SoC Side-channel analysis Voltage Dynamic range Filtering Security services Side-Channel Attacks Temperature sensors Random access memory Differential Power Analysis DPA Circuit faults Cryptography Hardware Differential power analysis DPA Linearity Side-channel attacks SCA Estimation Costs Confusion coefficient Computational modeling Writing Process variation Masking Formal proof Application-specific VLSI designs Field programmable gate arrays CPA Authentication Side-Channel Analysis SCA Countermeasure

 

Documents avec texte intégral

213

Références bibliographiques

428

Open access

39 %

Collaborations